The present invention relates to a method for determining defect detection sensitivity data, a control method of a defect detection apparatus, an apparatus of determining defect detection sensitivity data, and a method and apparatus for detecting defect of semiconductor devices.
It has been a significant matter of concern inspecting if semiconductor devices processed as required are defective in order to attain better yields and maintain the increased yields. Especially, the current semiconductor device manufacturing industry has been shifting its strategy from mass production of a restricted variety of items as represented by the production of semiconductor memories to reduced scale production of a great variety of items as in the production of logic circuits having short lives, and hence, it becomes a critical matter to efficiently perform the aforementioned semiconductor device defect inspections with the optimum sensitivity as much as possible.
Disclosed below is one of ways commonly taken to determine semiconductor devices as being defective from a defect of minute pattern shaped in wafer and a random defect found in unfinished crystalline phase of devices.
First, gathered are surface images of adjacent pairs of chips of the wafer or adjacent pairs of array blocks of a memory having cells deployed in matrix, which are produced into detectable format of optical images or electron-beam images. The detected images of the adjacent pairs of chips or cell array blocks are compared to one another to extract differences among them, and portions on a chip, for example, corresponding to the differences are discriminatively taken as defects of the chip.
More specifically, the differences are extracted by way of the filtering to eliminate noise from the obtained images of the adjacent pairs of the chips, and the succeeding counting of a uniqueness quantity (gray scale value) of each of pixels of the image. The uniqueness quantity of each pixel is compared with that of a counterpart image (e.g., these samples undergo subtraction). If the difference of the uniqueness quantities (gray scale values) is equal to a predetermined level (threshold value) or even higher, the pixel is discriminatively extracted as the difference.
However, such a method of detecting deficiencies of semiconductor devices has a requirement of setting an inspection apparatus with the aforementioned threshold value (inspection sensitivity) in advance, and a determination of the threshold value is a time consuming task. There is additional problem that the determined threshold value lacks reliability. These disadvantages in the prior art will be detailed below.
FIG. 24 is a flow chart illustrating a prior art method of setting the threshold value. With reference to FIG. 24, this prior art method will be described.
First, an arbitrary threshold value is set to the semiconductor device defect detection apparatus in advance (Step S101). Then, each of the pixels of a surface image taken for a targeted semiconductor device on an image pickup unit is converted in multi-level data to produce digitized image data (Step S102). The digitized image data is compared with another digitized image data obtained from the similar type of semiconductor device (e.g., an adjacent chip) on the single-pixel-at-a-time basis in the same manner as mentioned above, to detect differences of those digitized image data, and eventually, real portions of the semiconductor device corresponding to the differences are discriminatively determined as defects (Step S102). The defects are subjected to the sampling (Step S103) and then, undergo an eye inspection (review) by a human operator (Step S104). As a result of this inspection, it is checked if the defect detection level reaches the desired criteria on types and scales of the defects, that is, if the arbitrary threshold value is appropriate (Step S105). After the review, if the inspection level is satisfactory (YES at Step S105), the arbitrary threshold value preset is employed, or otherwise, if not (NO at Step S105), the procedural steps (Steps S101 to S105) are repeated from the setting of the threshold value to the review of the inspection level till it reaches the satisfactory inspection level.
As is recognized, the aforementioned manner of setting the threshold value may often have to repeat more than one set of steps starting with the setting of the arbitrary threshold value and terminated with the review of the inspection level till the determination of the threshold value, and inevitable is a time consuming task of trial and error till the eventual determination of the threshold level. In other words, the successful setting of the threshold value highly depends upon skills of a recipe planner (a person who determines factors including the threshold value), and it may take an unacceptably long time to obtain the threshold value and the required time for this task is often non-predictable.
There is additional disadvantage as mentioned below in this threshold value setting method, especially, in the step of defect review (Step S104 in FIG. 24). The defect review primarily includes a method of reviewing all the semiconductor devices judged as defective (total review) and a method of taking some samples from the defective semiconductor devices if there are so many (sampling review). The total review is more time consuming and not efficient, and the sampling review may leave the defective products unmarked to find a remarkable error in the determined threshold value, which often unavoidably leads to a re-correction of the threshold value.
To overcome the disadvantages, it has been necessary to provide an improved way of accurate quantitative setting of a threshold value to attain a reduced time high precision setting of the threshold value.
Semiconductor device mass production factories, which process numerous wafers of the same type, typically use a number of wafer inspection apparatuses for efficient inspection. However, such inspection apparatuses of the same type have their respective minor inherent peculiarities, and thus, it is undesirable to consistently use the same recipe (e.g., various requirements for each inspection such as the threshold value, an intensity of light directed to devices for image pickup, and so forth). This is why adjustments of components such as optics are necessary for the individual inspection apparatus with its own unique references. In general, since recipes are made in a non-quantitative fashion, a successful recipe highly depends upon how its planner is skilled, and such recipe making is a time consuming job. As mentioned above, it takes an extraordinarily long time to adjust optics of the inspection apparatus on the one-at-a-time basis; and this is a cause of varied performance in obtaining the results of the matching from one inspection apparatus to another.
The matching for the individual inspection apparatus will be exemplified as follows: First, more than one wafers, which have undergone the predetermined process, are inspected on an inspection apparatus to determine coordinates (defect coordinates) specifying defects detected in the wafer. The defect coordinates of the wafers are further examined to discriminatively extract master defect coordinates that are detected at an arbitrary detection rate or higher, and then, portions of the wafers corresponding to the master defect coordinates are counted to obtain the number of master defects and then saved. The sequence of tasks from detecting the defect coordinates of the wafers to saving the counted number of the master detects are repeated for the same wafers in the same fashion on the remaining inspection apparatuses. The results of the inspections on the inspection apparatuses are compared, and the inspection apparatuses have their respective optics regulated to have the same result on the master defects in number.
However, the wafers applied to the matching on the inspection apparatuses are standardized wafers prepared by a manufacturer of the inspection apparatuses and factory processed wafers, but are of different type from the inspection target wafers (the matching of and the types of the targeted wafers is impossible for various reasons such as a restriction of time). This way of the matching does not cover the thorough inspection of all wafers that should be inspected and does not satisfy the desired reliability.
It has been desired to carry out the matching on more than one inspection apparatuses with wafers of the same type as that of the inspection target wafers in a quantifying manner instead of the prior art time consuming matching method that causes the undesirably uneven matching results among the inspection apparatuses.
Furthermore, as also mentioned above, in the prior art recipe design for the inspection apparatuses, the fulfillment of the recipe highly depend upon the skills of its planner, and samples employed in the recipe is unsatisfactory in variation and number. Thus, the recipe designed in this way is not fully reliable and often lacks durability to noise (robustness). This is also a matter of concern in the standpoint of quality control (QC) of which orientation is periodical inspections and maintenance of the performance of the inspection apparatuses. This will be more detailed below.
FIG. 25 is a graph illustrating an example of the prior art inspection apparatus QC.
In the prior art inspection apparatus QC, the same sample is examined at predetermined time intervals (e.g., one-week intervals) with the same recipe, and a “fail or safe” test is discriminatively performed, depending upon if the result of the detection, namely, the total of defects is in a range of tolerance between the lower and upper limits of the number as in FIG. 25. If the detection result or the number of the defects is not in the range, the resolution is that the inspection apparatuses do not meet the standardized quality requirements and have to send for maintenance. As mentioned above, the fulfillment of the recipe depends upon the skills of the recipe planner, and as is often the case, any error factor cannot be negligible without leaving margin of the threshold value in the course of recipe planning. In such a case, an excessively large number of defects would be found to draw a conclusion that the inspection apparatuses actually meeting the quality requirements are numerically unsatisfied to conform to the standard. Thus, it has been an urgent matter of concern to provide the improved recipe planning, especially, the improved method of determining the threshold value to introduce and perform an appropriate inspection apparatus QC.
In the process lines of semiconductor devices at manufacturing plant, there are a variety of and a number of semiconductor manufacturing apparatuses for processes of wafers, and the semiconductor manufacturing apparatuses work with various process sequences for batch processing, multi-chamber processing, and so on. Hence, it is unavoidable that wafers having undergone various processes through the processes have lot-to-lot variations and wafer-to-wafer variations in the same lot. To avoid such variations, it is desired that the thorough inspection of all the wafers (total inspection) is carried out. Taking the cost and throughput into consideration, however, the total inspection of the wafers is hard to introduce. In typical practice, the upper limit in number of wafers the inspection apparatuses can deal with is predicted from a capacity of the apparatuses, and the inspection is performed to such as many a number of wafers as possible, although the number is limited, to reduce wafers skipping the inspection. For example, prior to the wafer inspection, a wafer-sampling plan is drafted based upon a statistical analysis of a manufacturing history of wafers to reduce the wafers overlooked without inspection with this solution, the wafer inspection still has a problem as mentioned below.
This wafer inspection is planned having great weight upon inspecting as many a number of wafers as possible with the limited number of inspection apparatuses, and the optimization of cost performance (or loss) is the second or third matter. A yield of the wafers is always varied, but factors of the; cost estimation such as the time interval from one inspection to the next (inspection frequency), the number of inspected wafers, and so forth, once determined, are never changed. Hence, a matter that cannot wait, is a tactic of automatically revising values of the cost factors, allowing for the optimized estimation of cost, in a quantifying manner.